ABOUT CORESELVA
Opening the machine, one understandable layer at a time.
CoreSelva is an independent open-hardware and education initiative building RISC-V processor IP, SoC components, and serious engineering learning resources.
THE PEOPLE
CoreSelva is developed by Karan Arjun Selvan and Vishal Selvan to create open processor cores while documenting the knowledge required to understand them.
The project grew from a simple problem: advanced computing systems are often taught as disconnected subjects. C programming, embedded firmware, digital logic, processor architecture, FPGA implementation, and verification may appear in different courses, but real hardware requires them to work together.
Together, Karan and Vishal are building CoreSelva as one coherent path: develop the hardware openly, explain the reasoning clearly, and keep the result available for others to inspect and extend.
WHY IT EXISTS
The gap is not a lack of information. It is a lack of connection.
CoreSelva exists to connect theory, implementation, and proof.
Readable before clever
A design should expose its important decisions. Compact code is not useful education if the architecture disappears inside it.
Evidence before claims
Implemented, planned, and research work are labelled separately. Tests and measurements should define what a design can honestly claim.
Depth without gatekeeping
Teaching can begin gently without becoming shallow. The path should take a newcomer from first principles to professional reasoning.
WHAT WE DO
Build open technical foundations.
- Develop readable RV64 and RV32 RISC-V processor cores.
- Create reusable peripherals for complete educational SoCs.
- Publish architecture goals, maturity, limitations, and source.
- Teach embedded C, hardware, RISC-V, FPGA design, and verification as connected skills.
THE GOAL
A complete open learning platform for computer systems.
The long-term goal is a family of understandable processor cores and SoC IP supported by curriculum, simulation, verification, FPGA examples, and practical documentation—from a beginner’s first C program to operating-system-capable RISC-V hardware.